I'm not sure if you missed the point. HDL design work is done by simulation for countless iterations before ever making it to a physical prototype. ASIC prototypes come very late in the cycle and are usually a low digit number of revs. So the point is simulation carries you through most of the design feedback cycle, and a significant economic and technical effort went into industry automatic place and route, DRC/LVS, etc. I am also ignoring the human heavy side of layout especially around analog and RF which is more like PCB design still.

A PCB can be reworked by hand on site. And those revs can be incorporated cheaply as you say. So the need to do all this programmatically is lowered below the economic threshold to make it all plausible in most cases. This presupposes that modern PCB tooling is itself semi-automated and includes simulation capabilities, but an expert operator is doing a lot of the decision making.