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by dmitrygr5 hours ago |
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upvoteby ajross5 hours ago|
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> what are you blathering on about, sir?

Please don't.

I mean, I applaud your work. But let's also be honest (in the "tough love" sense): those are all toys with significant limitations that preclude anyone shipping any of them on an actual device to an actual consumer. I mean, your SOC (maybe a $2 one) surely already includes a SPI master and USB host!

Actual interconnects that solve real market problems have big boring spec books and competing implementations and silicon vendors. The application for PIO is basically limited to "I have to connect to this crazy old junk and no one makes the part I'd otherwise need".

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upvoteby Gracana5 hours ago|
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Having dealt with the errata sheets for microcontrollers with all those fancy IO devices that solve real marketing problems etc, I'd kill to fix those problems with a software upgrade.
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upvoteby dmitrygr3 hours ago|
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if you find a SoC for $1 that has 2 Ethernet ports, and a usb host on it, while also having two cores and supporting 32MB of RAM you'll surprise me. rp2350 does all of the above for $1
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upvoteby duskwuff2 hours ago|
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Have you tested out the 2x PSRAM configuration; if so, have you written anything up about it? :) I've thought about a configuration like that myself but haven't committed to any hardware yet.
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upvoteby dmitrygr39 minutes ago|
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yes i have tested it and no i have not written about it (yet). it does work and with the new ISSI 16MB chips, it gives 32MB of continuous memory!
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upvoteby duskwuff31 minutes ago|
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Awesome - I might just have to try it.

How are you handling startup? The approach I had in mind was putting boot flash on the second channel with a separate CS pin from PSRAM and configuring that in OTP; any idea if that would work?

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