Tenstorrent is supposedly taping out 8-wide Ascalon processors as we speak, with devboards projected to be available in Q2/Q3 this year.
replyBTW. Keller is also on the board of AheadComputing — founded by former Intel engineers behind the fabled "Royal Core".
> At this point the most likely place for fast RISC-V to appear is China.
replyOr we just adopt Loongson.
TBH I still don't really get how it's different from MIPS. As far as I can tell... Loongson seems to be really just MIPS, while LoongArch is MIPS with some extra instructions.
replyLoongArch is, on a first approximation, an almost RISC-V user space instruction set together with MIPS-like privileged instructions and registers.
replyWait, this is a modern-ish ISA with a software-managed TLB, I didn’t realize that! The manual seems a bit unhappy about that part though:
reply> In the current version of this architecture specification, TLB refill and consistent maintenance between TLB and page tables are still [sic] all led by software.
https://loongson.github.io/LoongArch-Documentation/LoongArch...
They did get rid of the delay slots and some other MIPS oddities
replyBut legally distinct! I guess calling it Ｍ○ＰＳ was not enough for plausible deniability.
replyISAs shouldn't be patentable in the first place.
reply(purely on vibes) loongson feels to me like an intermediate step/backup strategy rather than a longterm target (though they'll probably power govt equipment for decades of legacy either way :p)
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