I've taken an interest in lock-free queues for ultra-low power embedded... think Cortex-m0, or even avr/pic.
replyThings get interesting when you're working with a cpu that lacks the ldrex/strem assembly instructions that makes this all work. I think youre only options at that point are disable/enable interrupts. IF anyone has any insights into this constraint I'd love to hear it.
For ultra low-power embedded, wouldn't a mutex approach work just fine? You're running on a single core anyway.
replyI'm not sure about the single-core scenario, but would love to learn if someone else wants to add something
replyIn reality multiple threads for single core doesn't make much sense right?
> In reality multiple threads for single core doesn't make much sense right?
replyNot necessarily, I think -- depends what you're doing.
LL/SC is still hinted at in the C++11 model with std::atomic<T>::compare_exchange_weak:
replyhttps://en.cppreference.com/w/cpp/atomic/atomic/compare_exch...