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by
NooneAtAll3
12 hours ago
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by
Jaso1024
12 hours ago
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I want to fix this, could you elaborate a bit (would help even more if you pressed the copy circuit and pasted the result here)
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by
NooneAtAll3
11 hours ago
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Add 2 AND gates, 1 NOT gate
G0 = D0 AND SEL
G1 = NOT SEL
G2 = D1 AND G1
G0 -> Ans
G2 -> Ans
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by
Jaso1024
9 hours ago
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parent
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oh its b/c of the contention between the outputs of the ands for the answer, u need an or gate to merge them (ill add an update w/ visual feedback for these sorts of thigns)
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by
luyu_wu
11 hours ago
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It's likely you are pulling one to ground somehow. That was a common bug I faced.
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