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I've made it through about the first ten parts of section 2. Some additional feedback I've put together:

* Sometimes explanations are overly lacking, other times they get repetitive. This feels like it needs to be accompanied by a course to fully deliver value. For instance, we're kind of thrown into truth gates without having really gone over them. And understanding how to combine NMOS and PMOS gates could use a better intro. Once I knew the answers, I got my brain to reset to my VLSI course from college, but I think a better primer could've accomplished that. In other places, I feel like we get more refreshers on some components than others.

* The routing algorithm needs to be better. I get a lot of staircase wires and straight up overlaps.

* Right clicking should clear attempted connections.

* There should be away to delete components you've placed. Maybe I just couldn't figure it out.

* I think icons should be included on the components pane. I kept clicking NOR when I wanted NOT and a better visual cue would have helped.

* It feels like difficulty is all over the place. Perhaps this is corrected with better explanations, but creating the NAND gates and NOR gates were much more difficult compared to AND and OR. Perhaps actually having us construct those gates without NOT would change the difficulty curve.

* The success overlay shows up too fast. Especially on levels that are just a demonstration (like the NMOS and PMOS Again levels) you don't get to to see everything the level is trying to demonstrate before the level announces that you have succeeded.

* In the intros, when there are new components, their description pops in. Instead, it should just advance like a slide. It's very jarring.

* Also, it's unclear that those aren't part of the intro. Maybe instead of popping them up, flash the little information icon next to them.

* What you call a capacitor I believe is actually a combination of a transistor and a capacitor. I think people will be hard pressed to find documentation on a capacitor with an enable switch. But, then you use this same capacitor to form a 1T1C cell. I'm rather confused.

* Many times when I finished a level, the circuit would switch to a prior level's solution.

* Some components have the same letters for every terminal (e.g. half-adders), meaning you need to scroll over the terminals to know what they do.

* Some levels have many test cases, and there's now way to see them all.

* Level 2.3 talks about us having registers, but we never covered those. In fact, I think we're still a ways away since we need to get from switches to flip-flops then to registers.

There isn't much order to this. Just what I recorded while working through it. Overall it's pretty good, I just think polish would got quite a ways.

Thank you for sharing this! I'm really excited to get to the more GPU specific parts. I basically did this for CPUs in college and I'm excited to see what preconception and missing conceptions I have for GPUs.

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Thanks for all the feedback! I've fixed some of these issues (e.g., capacitor levels, switching back to prior levels upon finishing / refreshing, deletion (theres a sign when you hover a component now)), but many of them i'll be fixing today.

I'll be uploading arcs 3 and 4 soon (which will be programming the CPU and the start of GPU arch soon (people have gone through arcs 1 and 2 slightly faster than I expected)

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