Sparc (not a VLIW ISA) also had rotating register windows. But ia64 had a twist on it: the register window size was dynamic and "allocated" by the callee with an alloc instruction

The only other ISA I know of that did something similar was the Am29000

The Am29000 modeled it in an interesting way though:

The register file consisted of 128 global registers but the instruction encoding allowed to specify an "indirect register index" mode where the operand register was computed from the content of gr1 plus an offset. Thus gr1 acted as a "register window stack pointer". I _think_ such a computed register index would then be used to index into a separate register file for locals (and arguments etc) but I'm not sure.

Anybody here is familiar with this quite old ISA?

(I'm really interested in the richness of the CPU design space, the history of which is fascinating)

Rotating register windows are a distinguishing feature of the Berkeley RISC design, which predates VLIW by at least a decade.