Thanks for the links. This doesn't seem to be a true RISC-V MMU (according to the Sv32 specification) integrated into the CPU core itself, but just a peripheral designed for memory mapped SPI flash and PSRAM. So as far as I understand there is no true process isolation with page faults and dynamic paging.
replySv32 is what every 32-bit RISC-V CPU with an MMU uses. It is a full MMU. You can run Linux on it.
replySure, but what the S31 calls "MMU" is not an Sv32 MMU; therefore my comment.
replyThe documentation states:
reply> Compliant with RISC-V Sv32 virtual memory scheme
https://documentation.espressif.com/esp32-s31_datasheet_en.p...
Ok, I see. The S3’s "MMU" is just an external-memory mapper, not a virtual-memory MMU. The S31 apparently has both, that mapper plus an architectural CPU-side Sv32 MMU; that offers indeed a lot of interesting possibilities.
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replyThe Microchip PIC32MZ MCU has an MMU as well. But not with wireless options in a 8x8 QFN80 package like this ESP32-S31. That's pretty small. No flash though.
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