Chips are made from silicon wafers that are ~0.8mm thick. The transistor layer is built on one side of the wafer (because the transistors need to be built from epitaxial silicon, that is, where all the atoms are neatly arranged, and you cannot deposit a perfect epitaxial layer). Then the metal layers are built on top, by depositing copper and dielectric (traditionally silicon dioxide, that is, glass, but these days some more exotic stuff is used too).

Then that chip is flipped around, so the transistors and metal layers face the pcb. Most of the chip on the upside is just bulk silicon, and there for structural and heat spreading purposes, it's not needed for operation.

When chips are built out of multiple stacked layers, typically they thin the chips that go below and leave a thick bulk layer on the topmost one. IIRC, for some AMD chips they needed to use a separate, unprocessed bulk heat spreader layer for bonding reasons.

I would guess that the effective layers are super thin. But such super thin parts do not have much structural integrity. So you leave material under it so that you can handle it. And then just drill to those parts as needed.

On the bottom [0], youtuber/cooling specialist/tuner der8auer did an interview with an intel engineer a few years ago. One of the points they bring up is that it's not a pure gain to have less silicon between the logic and the next interface to another material conducting heat away as the silicon itself acts as a conductor/spreader, i.e. sideways as well as upwards, so there's a balance.

[0] https://youtu.be/ljZt_TQegHE?t=120

No, that’s the die sawed out of a wafer. Those are wafer-thin, i.e. about 0.8mm. On some newer CPUs the wafer is ground down to improve thermals. In normal C4 packaging like here the active layer is sandwiched between the metal layers (which sit on the interposer PCB) and the bulk silicon (95% of the thickness upwards, to the camera). Silicon is not a great heat conductor.