IMO the next big shift in AI hardware is when some of the upcoming logic-compatible memory types mature. Inference inherently likes many small local pools of memory, with their own interface each. This is impractical with currently available memory other than sram.
Wafers can have trillions of transistors, 10-16 times more than the 4 trillion of the WSE-3.
1 Terabyte of SRAM per wafer will be the upper limit for a few years [1].